x86 Processor Reference

  • Home

Filters

Sections

Advertisement

x86 Registers

General Purpose registers
Name / Purpose 8 bit 16 bit 32 bit
Accumulator AL/AH AX EAX
Base BL/BH BX EBX
Counter CL/CH CX ECX
Data DL/DH DX EDX
Pointer / Index registers
Name / Purpose 16 bit 32 bit
Source Index SI ESI
Destination Index DI EDI
Instruction Pointer IP IP
Segment 808x / "Real Mode"
Selector 286+ ProtectedMode)
Selector 386+ Enhanced mode)
Name / Purpose Mnemonic Availability
Code Segment/Selector CS all
Data Segment/Selector DS all
Stack Segment/Selector SS all
Extra Segment/Selector ES all
F Selector (generic use) FS 80386+
G Selector (generic use) GS 80386+
Stack registers
Name / Purpose 16 bit 32 bit
Stack Pointer SP ESP
Base Pointer BP EBP
Segment Overrides
register(s) Default Segment Valid Overrides
BP SS DS, ES, CS
BX, SI, DI DS ES, SS, CS
DI Strings ES NONE
SI Strings DS ES, SS, CS
Special registers (386+ only)
Control register 0 CR0
Control register 1 CR1
Control register 2 CR2
Test register 4 TR4
Test register 5 TR5
Test register 6 TR6
Test register 7 TR7
Debug register 0 DR0
Debug register 1 DR1
Debug register 2 DR2
Debug register 3 DR3
Debug register 6 DR6
Debug register 7 DR7
Flags Register
Name Mnemonic
/ Value
Bit
(dec)
Mask
(hex)
For more information see
PUSHF, POPF, STI, CLI, STD, and CLD
Carry Flag CF 0 0x0001
? 1 1 0x0002
Parity Flag PF 2 0x0004
? 0 3 0x0008
Auxiliary Flag AF 4 0x0010
? 0 5 0x0020
Zero Flag ZF 6 0x0040
Sign Flag SF 7 0x0080
Trap Flag
(single step)
TF 8 0x0100
Interrupt Flag IF 9 0x0200
Direction Flag DF 10 0x0400
Overflow Flag OF 11 0x0800
I/O Privilege Level
(286+ Only)
IOPL 12 and 13 0x03000
Nested Task Flag NT 14 0x4000
? 0 15 0x8000
Resume Flag
(386+ only)
RF 16 0x00010000
Virtual Mode Flat
(386+ only)
VM 17 0x00020000

Clock Cycle Calculations and Tables

Effective Address (EA) Calculation
Description Clocks
Add 4 cycles for word operands at odd addresses
Add 2 cycles for segment override
80188/80186 timings differ from those of the 8088/8086/80286
Displacement 6
Base or Index (BX,BP,SI,DI) 5
Displacement+(Base or Index) 9
Base+Index (BP+DI,BX+SI) 7
Base+Index (BP+SI,BX+DI) 8
Base+Index+Displacement (BP+DI,BX+SI) 11
Base+Index+Displacement (BP+SI+disp,BX+DI+disp) 12
Task State Calculation
"TS" is defined as switching from VM/486 or 80286 TSS to one of the following:
Old Task New Task
486 TSS
VM = 0
486 TSS
VM = 1
386 TSS
VM = 0
386 TSS
VM = 1
286 TSS
386 TSS VM = 0 - - 309 226 282
386 TSS VM = 1 - - 314 231 287
386 CPU / 286 TSS - - 307 224 280
486 CPU / 286 TSS 199 177 - - 180

Instruction Clock Cycle Calculation

Some instructions require additional clock cycles due to a "Next Instruction Component" identified by a "+ m" in the instruction clock cycle listings. This is due to the prefetch queue being purge on a control transfers. Below is the general rule for calculating "m":

8088 / 8086
not applicable
80286
"m" is the number of bytes in the next instruction
80386
"m" is the number of components in the next instruction (the instruction coding (each byte), plus the data and the displacement are all considered components)

Miscellaneous

  • All timings are for best case and do not take into account wait states, instruction alignment, the state of the prefetch queue, DMA refresh cycles, cache hits/misses or exception processing.
  • To convert clocks to nanoseconds divide one microsecond by the processor speed in MegaHertz:
    ( 1000MHz / (n MHz) ) = X nanoseconds

Machine Status Word (286+ only)

Name / Purpose Mnemonic Bit (decimal) Mask (hex)
For more information see SMSW and LMSW
Protection Enable PE 0 0x0000000000000001
Protection Enable, switches processor between protected and real mode
Math Present MP 1 0x0000000000000002
Math Present, controls function of the WAIT instruction
Emulation EM 2 0x0000000000000004
Emulation, indicates whether co-processor functions are to be emulated
Task Switched TS 3 0x0000000000000008
Task Switched, set and interrogated by co-processor on task switches and when interpreting co-processor instructions
Extension Type ET 4 0x0000000000000010
Extension Type, indicates type of co-processor in system
Reserved 5..30 0x7FFFFFFFFFFFFFE0
Paging PG 31 0x8000000000000000
Paging, indicates whether the processor uses page tables to translate linear addresses to physical addresses

x86 Instruction Set

Instruction Set

AAA - Ascii Adjust for Addition

Usage
AAA
Modifies
AF, CF (OF, PF, SF, ZF undefined)

Changes contents of AL to valid unpacked decimal. The high order nibble is zeroed.

Clocks Size
Bytes
Operands 808x 286 386 486
None 83431

Example:


	MOV AX, '52' ; 0x3532
	ADD AL, '6'  ; 0x36 ASCII + 0x32 = 0x68
	AAA          ; AL = 0x08, AH = 0x35, CF = 0
	ADD AL, '3'  ; 0x33 ASCII + 0x09 = 0x3C
	AAA          ; AL = 0x02, AH = 0x36, CF = 1

AAD - Ascii Adjust for Division

Usage
AAD
Modifies
SF ZF PF (AF,CF,OF undefined)

Used before dividing unpacked decimal numbers. Multiplies AH by 10 and the adds result into AL. Sets AH to zero. This instruction is also known to have an undocumented behavior.

AL := 10 * AH + AL
	AH := 0
Clocks Size
Bytes
Operands 808x 286 386 486
None 601419142

Example:


	MOV AX, '45'   ; 0x3435 ASCII 45
	AND AX, 0x0F0f ; AX = 0405, BCD 45
	AAD            ; AX = 0x002D = HEX 45
	MOV BL, 0x07
	DIV BL         ; 0x002D / 7 == AL = 0x06, AH = 0x03
	OR  AX, 0x3030 ; AL = 36 ASCII quotient
								 ; AH = 33 ASCII remainder

AAM - Ascii Adjust for Multiplication

Usage
AAM
Modifies
PF SF ZF (AF,CF,OF undefined)
AH := AL / 10
	AL := AL mod 10

Used after multiplication of two unpacked decimal numbers, this instruction adjusts an unpacked decimal number. The high order nibble of each byte must be zeroed before using this instruction. This instruction is also known to have an undocumented behavior.

Clocks Size
Bytes
Operands 808x 286 386 486
None 831617152

Example:


	MOV  AL, '5'    ; AL = 0x35, ASCII 5
	AND  AL, 0x0F   ; AL = 0x05, BCD 5
	MOV  BL, '4'    ; BL = 0x34, ASCII 4
	AND  BL, 0x0F   ; BL = 0x05, BCD 4
	MUL  BL         ; AX = 0x0014, Decimal 20
	AAM             ; AX = 0x0200, BCD 20
	OR   AX, 0x3030 ; AX = 0x3230, ASCII 20

AAS - Ascii Adjust for Subtraction

Usage
AAS
Modifies
AF CF (OF,PF,SF,ZF undefined)

Corrects result of a previous unpacked decimal subtraction in AL. High order nibble is zeroed.

Clocks Size
Bytes
Operands 808x 286 386 486
None 83431

Example:


	MOV  AL, 0x32  ; AL = 0x32, ASCII 2
	MOV  DH, 0x37  ; DH = 0x37, ASCII 7
	SUB  AL, DH    ; AL = 0xFB, Two's compliment negative 5
	AAS            ; AL = 0x05, CF = 1

ADC - Add With Carry

Usage
ADC dest, src
Modifies
AF CF OF SF PF ZF

Sums two binary operands placing the result in the destination. If CF is set, a 1 is added to the destination.

Clocks Size
Bytes
Operands 808x 286 386 486
reg, reg 32212
mem, reg 16 + EA
7732-4
reg, mem 9 + EA
7622-4
reg, imm 43213-4
mem, imm 17 + EA
7733-6
acc, imm 43212-3

ADD - Arithmetic Addition

Usage
ADD dest, src
Modifies
AF CF OF PF SF ZF

Adds "src" to "dest" and replacing the original contents of "dest". Both operands are binary.

Clocks Size
Bytes
Operands 808x 286 386 486
reg, reg 32212
mem, reg 16 + EA
7732-4
reg, mem 9 + EA
7622-4
reg, imm 43213-4
mem, imm 17 + EA
7733-6
acc, imm 43212-3

AND - Logical And

Usage
AND dest, src
Modifies
CF OF PF SF ZF (AF undefined)

Performs a logical AND of the two operands replacing the destination with the result.

Clocks Size
Bytes
Operands 808x 286 386 486
reg, reg 32212
mem, reg 16 + EA
7732-4
reg, mem 9 + EA
7612-4
reg, imm 43213-4
mem, imm 17 + EA
7733-6
acc, imm 43212-3

ARPL - Adjusted Requested Privilege Level of Selector (286+ PM)

Usage
ARPL dest, src
286+ protected mode
Modifies
ZF

Compares the RPL bits of "dest" against "src". If the RPL bits of "dest" are less than "src", the destination RPL bits are set equal to the source RPL bits and the Zero Flag is set. Otherwise the Zero Flag is cleared.

Clocks Size
Bytes
Operands 286 386 486
reg, reg102092
mem, reg112194

BOUND - Array Index Bound Check (80188+)

Usage
BOUND src,limit
Modifies
None

Array index in source register is checked against upper and lower bounds in memory source. The first word located at "limit" is the lower boundary and the word at "limit+2" is the upper array bound. Interrupt 5 occurs if the source value is less than or higher than the source.

Clocks Size
Bytes
Operands 286 386 486
nj = no jump taken
reg16, mem32 nj=13nj=1072
reg32,mem64 nj=13nj=1072

BSF - Bit Scan Forward (386+)

Usage
BSF dest, src
Modifies
ZF

Scans source operand for first bit set. Sets ZF if a bit is found set and loads the destination with an index to first set bit. Clears ZF is no bits are found set. BSF scans forward across bit pattern (0-n) while BSR scans in reverse (n-0).

Clocks Size
Bytes
Operands 386 486
reg, reg 10+3n6-423
reg, mem 10+3n7-433-7
reg32, reg32 10+3n6-423-7
reg32, mem32 10+3n7-433-7

BSR - Bit Scan Reverse (386+)

Usage
BSR dest, src
Modifies
ZF

Scans source operand for first bit set. Sets ZF if a bit is found set and loads the destination with an index to first set bit. Clears ZF is no bits are found set. BSF scans forward across bit pattern (0-n) while BSR scans in reverse (n-0).

Clocks Size
Bytes
Operands 386 486
reg, reg 10+3n6-1033
reg, mem 10+3n7-1043-7
reg32, reg32 10+3n6-1033-7
reg32, mem32 10+3n7-1043-7

BSWAP - Byte Swap (486+)

Usage
BSWAP reg32
Modifies
none

Changes the byte order of a 32 bit register from big endian to little endian or vice versa. Result left in destination register is undefined if the operand is a 16 bit register.

Clocks Size
Bytes
Operands 486
reg32 12

BT - Bit Test (386+)

Usage
BT dest, src
Modifies
CF

The destination bit indexed by the source value is copied into the Carry Flag.

Clocks Size
Bytes
Operands 386 486
reg16, imm8 334-8
mem16, imm8 664-8
reg16, reg16 333-7
mem16, reg16 12123-7

BTC - Bit Test with Compliment (386+)

Usage
BTC dest, src
Modifies
CF

The destination bit indexed by the source value is copied into the Carry Flag after being complimented (inverted).

Clocks Size
Bytes
Operands 386 486
reg16, imm8 664-8
mem16, imm8 884-8
reg16, reg16 663-7
mem16, reg16 13133-7

BTR - Bit Test with Reset (386+)

Usage
BTR dest, src
Modifies
CF

The destination bit indexed by the source value is copied into the Carry Flag and then cleared in the destination.

Clocks Size
Bytes
Operands 386 486
reg16, imm8 664-8
mem16, imm8 884-8
reg16, reg16 663-7
mem16, reg16 13133-7

BTS - Bit Test and Set (386+)

Usage
BTS dest, src
Modifies
CF

The destination bit indexed by the source value is copied into the Carry Flag and then set in the destination.

Clocks Size
Bytes
Operands 386 486
reg16, imm8 664-8
mem16, imm8 884-8
reg16, reg16 663-7
mem16, reg16 13133-7

CALL - Procedure Call

Usage
CALL near16
CALL near32
CALL reg16 (near, indirect)
CALL reg32 (near, indirect)
CALL mem16 (near, indirect)
CALL mem32 (near, indirect)
CALL mem16:16 (far, indirect)
CALL mem16:32 (far, indirect)
CALL ptr16:16 (far)
CALL ptr16:32 (far)
Modifies
None

Pushes Instruction Pointer (and Code Segment for far calls) onto stack and loads Instruction Pointer with the address dest.

Code continues with execution at CS:IP.

Clocks Size
Bytes
Operands 808x 286 386 486
near16 1977+m3
near32 --7+m3
reg16 (near, register indirect) 1677+m5
reg32 (near, register indirect) --7+m5
mem16 (near, memory indirect) 21 + EA1110+m5
mem32 (near, memory indirect) --10+m5
ptr16:16 (far, full ptr supplied) 281317+m18
ptr16:32 (far, full ptr supplied) --17+m18
ptr16:16 (far, ptr supplied, prot. mode) -2634+m20
ptr16:32 (far, ptr supplied, prot. mode) --34+m20
m16:16 (far, indirect) 37 + EA1622+m17
m16:32 (far, indirect) --22+m17
m16:16 (far, indirect, prot. mode) -2938+m20
m16:32 (far, indirect, prot. mode) --38+m20
ptr16:16 (task, via TSS or task gate) -177TS37+TS
m16:16 (task, via TSS or task gate) -180/1855+TS37+TS
m16:32 (task) --TS37+TS
m16:32 (task) --5+TS37+TS
ptr16:16 (gate, same privilege) -4152+m35
ptr16:32 (gate, same privilege) --52+m35
m16:16 (gate, same privilege) -4456+m35
m16:32 (gate, same privilege) --56+m35
ptr16:16 (gate, more priv, no parm) -8286+m69
ptr16:32 (gate, more priv, no parm) --86+m69
m16:16 (gate, more priv, no parm) -8390+m69
m16:32 (gate, more priv, no parm) --90+m69
ptr16:16 (gate, more priv, x parms) -86+4x94+4x+m77+4x
ptr16:32 (gate, more priv, x parms) --94+4x+m77+4x
m16:16 (gate, more priv, x parms) -90+4x98+4x+m77+4x
m16:32 (gate, more priv, x parms) --98+4x+m77+4x

CBW - Convert Byte to Word

Usage
CBW
Modifies
None

Converts byte in AL to word Value in AX by extending sign of AL throughout register AH.

Clocks Size
Bytes
Operands 808x 286 386 486
none 22331

CDQ - Convert Double to Quad (386+)

Usage
CDQ
Modifies
None

Converts signed DWORD in EAX to a signed quad word in EDX:EAX by extending the high order bit of EAX throughout EDX

Clocks Size
Bytes
Operands 386 486
none 231

CLC - Clear Carry

Usage
CLC
Modifies
CF

Clears the Carry Flag.

Clocks Size
Bytes
Operands 808x 286 386 486
none 22221

CLD - Clear Direction Flag

Usage
CLD
Modifies
DF

Clears the Direction Flag causing string instructions to increment the SI and DI index registers.

Clocks Size
Bytes
Operands 808x 286 386 486
none 22221

CLI - Clear Interrupt Flag (disable)

Usage
CLI
Modifies
IF

Disables the maskable hardware interrupts by clearing the Interrupt flag. NMI's and software interrupts are not inhibited.

Clocks Size
Bytes
Operands 808x 286 386 486
none 22351

CLTS - Clear Task Switched Flag (286+ privileged)

Usage
CLTS
Modifies
None

Clears the Task Switched Flag in the Machine Status register. This is a privileged operation and is generally used only by operating system code.

Clocks Size
Bytes
Operands 286 386 486
none 2572

CMC - Complement Carry Flag

Usage
CMC
Modifies
CF

Toggles (inverts) the Carry Flag

Clocks Size
Bytes
Operands 808x 286 386 486
none 22221

CMP - Compare

Usage
CMP dest, src
Modifies
AF CF OF PF SF ZF

Subtracts source from destination and updates the flags but does not save result. Flags can subsequently be checked for conditions.

Clocks Size
Bytes
Operands 808x 286 386 486
reg, reg 32212
mem, reg 9 + EA
7522-4
reg, mem 9 + EA
6622-4
reg, imm 43213-4
mem, imm 10 + EA
6523-6
acc, imm 43212-3

CMPS - Compare String

Usage
CMPSx dest, src
Where 'x' is one of B, D, or W.
Modifies
AF CF OF PF SF ZF

Subtracts destination value from source without saving results. Updates flags based on the subtraction and the index registers (E)SI and (E)DI are incremented or decremented depending on the state of the Direction Flag. CMPSB inc/decrements the index registers by 1, CMPSW inc/decrements by 2, while CMPSD increments or decrements by 4. The REP prefixes can be used to process entire data items.

Clocks Size
Bytes
Operands 808x 286 386 486
dest, src 22 81081

CMPXCHG - Compare and Exchange

Usage
CMPXCHG dest, src (486+)
Modifies
AF CF OF PF SF ZF

Compares the accumulator (8-32 bits) with "dest". If equal the "dest" is loaded with "src", otherwise the accumulator is loaded with "dest".

Clocks Size
Bytes
Operands 486
reg, reg 62
mem, reg 72
  • add 3 clocks if the "mem, reg" comparison fails

CWD - Convert Word to Doubleword

Usage
CWD
Modifies
None

Extends sign of word in register AX throughout register DX forming a doubleword quantity in DX:AX.

Clocks Size
Bytes
Operands 808x 286 386 486
none 52231

CWDE - Convert Word to Extended Doubleword (386+)

Usage
CWDE
Modifies
None

Converts a signed word in AX to a signed doubleword in EAX by extending the sign bit of AX throughout EAX.

Clocks Size
Bytes
Operands 386 486
none 331

DAA - Decimal Adjust for Addition

Usage
DAA
Modifies
AF CF PF SF ZF (OF undefined)

Corrects result (in AL) of a previous BCD addition operation. Contents of AL are changed to a pair of packed decimal digits.

Clocks Size
Bytes
Operands 808x 286 386 486
none 43421

Example:


	MOV AL, 0x47 ; AL = 0b0100:0111
	ADD AL, 0x38 ; AL = 0x7F, invalid packed BCD
	DAA          ; AL = 0b1000:0101, 0x85, valid packed BCD
	; 7 + 8 = 15, so 5 carry 1. 3 + 4 + carry = 8. 

DAS - Decimal Adjust for Subtraction

Usage
DAS
Modifies
AF CF PF SF ZF (OF undefined)

Corrects result (in AL) of a previous BCD subtraction operation. Contents of AL are changed to a pair of packed decimal digits.

Clocks Size
Bytes
Operands 808x 286 386 486
none 43421

Example:


	MOV  AL, 0x45  ; AL = 0b0100:0101
	SUB  AL, 0x17  ; AL = 0b0010:1110, 0x2E invalid BCD
	DAS            ; AL = 0b0010:1000, 0x28, valid BCD result
	; carry 1, 15 - 7 = 8. 4 - 1 - carry = 2.

DEC - Decrement

Usage
DEC dest
Modifies
AF OF PF SF ZF

Unsigned binary subtraction of one from the destination.

Clocks Size
Bytes
Operands 808x 286 386 486
reg8 32212
mem 15 + EA7632-4
reg16/32 32211

DIV - Divide

Usage
DIV src
Modifies
(AF,CF,OF,PF,SF,ZF undefined)

Unsigned binary division of accumulator by source. If the source divisor is a byte value then AX is divided by "src" and the quotient is placed in AL and the remainder in AH. If source operand is a word value, then DX:AX is divided by "src" and the quotient is stored in AX and the remainder in DX.

Clocks Size
Bytes
Operands 808x 286 386 486
reg8 80-901414162
reg16 144-1622222242
reg32 --38402
mem8 (86-96) + EA1717162-4
mem16 (150-168) + EA
2525242-4
mem32 --41402-4

ENTER - Make Stack Frame (80188+)

Usage
ENTER locals,level
Modifies
None

Modifies stack for entry to procedure for high level language. Operand "locals" specifies the amount of storage to be allocated on the stack. "Level" specifies the nesting level of the routine. Paired with the LEAVE instruction, this is an efficient method of entry and exit to procedures.

Clocks Size
Bytes
Operands 286 386 486
imm16,0 1110144
imm16,1 1512174
imm16, imm8 12+4(n-1 15+4(n-1)17+3n4

ESC - Escape

Usage
ESC immed, src
Modifies
None

Provides access to the data bus for other resident processors. The CPU treats it as a NOP but places memory operand on bus.

Clocks Size
Bytes
Operands 808x 286 386 486
immed, reg 29-20??2
immed, mem 29-20??2-4

HLT - Halt CPU

Usage
HLT
Modifies
None

Halts CPU until RESET line is activated, NMI or maskable interrupt received. The CPU becomes dormant but retains the current CS:IP for later restart.

Clocks Size
Bytes
Operands 808x 286 386 486
none 22541

IDIV - Signed Integer Division

Usage
IDIV src
Modifies
(AF,CF,OF,PF,SF,ZF undefined)

Signed binary division of accumulator by source. If source is a byte value, AX is divided by "src" and the quotient is stored in AL and the remainder in AH. If source is a word value, DX:AX is divided by "src", and the quotient is stored in AL and the remainder in DX.

Clocks Size
Bytes
Operands 808x 286 386 486
reg8 101-1121719192
reg16 165-1842527272
reg32 --43432
mem8 (107-118) + EA2022202-4
mem16 (171-190) + EA
3830282-4
mem32 --46442-4

IMUL - Signed Multiply

Usage
IMUL src
IMUL src, immed (286+)
IMUL dest, src ,imm8 (286+)
IMUL dest, src (386+)
Modifies
CF OF (AF,PF,SF,ZF undefined)

Signed multiplication of accumulator by "src" with result placed in the accumulator. If the source operand is a byte value, it is multiplied by AL and the result stored in AX. If the source operand is a word value it is multiplied by AX and the result is stored in DX:AX. Other variations of this instruction allow specification of source and destination registers as well as a third immediate factor.

Clocks Size
Bytes
Operands 808x 286 386 486
reg8 80-98139-1413-182
reg16 128-154219-2213-262
reg32 --9-3812-422
mem8 86-1041612-1713-182-4
mem16 134-1602412-2513-262-4
mem32 --12-4113-422-4
reg16, reg16 --9-2213-263-5
reg32, reg32 --9-3813-423-5
reg16, mem16 --12-2513-263-5
reg32, mem32 --12-4113-423-5
reg16, immed -219-2213-263
reg32, immed -219-3813-423-6
reg16, reg16, immed -29-2213-263-6
reg32, reg32, immed -219-3813-423-6
reg16, mem16, immed -2412-2513-263-6
reg32, mem32, immed -2412-4113-423-6

IN - Input Byte or Word From Port

Usage
IN accum, port
Modifies
None

A byte, word or dword is read from "port" and placed in AL, AX or EAX respectively. If the port number is in the range of 0-255 it can be specified as an immediate, otherwise the port number must be specified in DX. Valid port ranges on the PC are 0-1024, though values through 65535 may be specified and recognized by third party vendors and PS/2's.

Clocks Size
Bytes
Operands 808x 286 386 486
accum, imm8 10/14512142
accum, imm8 (PM) --6/268/28/272
accum, DX 8/12513141
accum, DX (PM) --7/278/28/271
  • 386+ protected mode timings depend on privilege levels.
    First number is the timing if:
    CPL ≤ IOPL
    Second number is the timing if:
    CPL > IOPL or in VM 86 mode (386)
    CPL ≥ IOPL (486)
    Third number is the timing when:
    virtual mode on 486 processor
  • 486 virtual mode always requires 27 cycles

INC - Increment

Usage
INC dest
Modifies
AF OF PF SF ZF

Adds one to destination unsigned binary operand.

Clocks Size
Bytes
Operands 808x 286 386 486
reg8 32212
reg16 32211
reg32 32211
mem 15 + EA
7632-4

INS - Input String from Port (80188+)

Usage
INS dest, port
INSB
INSW
INSD (386+)
Modifies
None

Loads data from port to the destination ES:(E)DI (even if a destination operand is supplied). (E)DI is adjusted by the size of the operand and increased if the Direction Flag is cleared and decreased if the Direction Flag is set. For INSB, INSW, INSD no operands are allowed and the size is determined by the mnemonic.

Clocks Size
Bytes
Operands 286 386 486
dest, port 515171
dest, port (PM) 59/2910/32/301
none 515171
none (PM) 59/2910/32/301
  • 386+ protected mode timings depend on privilege levels.
    First number is the timing if:
    CPL ≤ IOPL
    Second number is the timing if:
    CPL > IOPL
    Third number is the timing if:
    virtual mode on 486 processor

INT - Interrupt

Usage
INT num
Modifies
TF IF

Initiates a software interrupt by pushing the flags, clearing the Trap and Interrupt Flags, pushing CS followed by IP and loading CS:IP with the value found in the interrupt vector table. Execution then begins at the location addressed by the new CS:IP

Clocks Size
Bytes
Operands 808x 286 386 486
3 (constant) 52/7223+m33262
3 (prot. mode, same priv.) -40+m59442
3 (prot. mode, more priv.) -78+m99712
3 (from VM86 to PL 0) --119822
3 (prot. mode via task gate) -167+mTS37+TS2
imm8 51/7123+m37301
imm8 (prot. mode, same priv.) -40+m59441
imm8 (prot. mode, more priv.) -78+m99711
imm8 (from VM86 to PL 0) --119861
imm8 (prot. mode, via task gate) -167+mTS37+TS1

INTO - Interrupt on Overflow

Usage
INTO
Modifies
IF TF

If the Overflow Flag is set this instruction generates an INT 4 which causes the code addressed by 0000:0010 to be executed.

Clocks Size
Bytes
Operands 808x 286 386 486
none: jump 53/7324+m35281
none: no jump 43331
(prot. mode, same priv.) --59461
(prot. mode, more priv.) --99731
(from VM86 to PL 0) --119841
(prot. mode, via task gate) --TS39+TS1

INVD - Invalidate Cache (486+)

Usage
INVD
Modifies
none

Flushes CPU internal cache. Issues special function bus cycle which indicates to flush external caches. Data in write-back external caches is lost.

Clocks Size
Bytes
Operands 486
none42

INVLPG - Invalidate Translation Look-Aside Buffer Entry (486+)

Usage
INVLPG
Modifies
none

Invalidates a single page table entry in the Translation Look-Aside Buffer. Intel warns that this instruction may be implemented differently on future processors.

Clocks Size
Bytes
Operands 486
none122
  • timing is for TLB entry hit only.

IRET / IRETD - Interrupt Return

Usage
IRET
IRETD (386+)
Modifies
AF CF DF IF PF SF TF ZF

Returns control to point of interruption by popping IP, CS and then the Flags from the stack and continues execution at this location. CPU exception interrupts will return to the instruction that cause the exception because the CS:IP placed on the stack during the interrupt is the address of the offending instruction.

Clocks Size
Bytes
Operands 808x 286 386 486
iret 32/4417+m22151
iret (prot. mode) -31+m38151
iret (to less privilege) -55+m82361
iret (different task, NT=1) -169+mTSTS+321
iretd --22/38151
iretd (to less privilege) --82361
iretd (to VM86 mode) --60151
iretd (different task, NT=1) --TSTS+321
  • 386 timings are listed as real-mode/protected-mode

Jxx Conditional Jumps

Usage
Jxx near8
Jxx near16 (386+)
Where xx is any of the mnemonics from below
Modifies
IP
Mnemonic Meaning Jump Condition
JAJump if AboveCF=0 and ZF=0
JAEJump if Above or EqualCF=0
JBJump if BelowCF=1
JBEJump if Below or EqualCF=1 or ZF=1
JCJump if CarryCF=1
JCXZJump if CX ZeroCX=0
JEJump if EqualZF=1
JGJump if Greater (signed)ZF=0 and SF=OF
JGEJump if Greater or Equal (signed)SF=OF
JLJump if Less (signed)SF != OF
JLEJump if Less or Equal (signed)ZF=1 or SF != OF
JMPUnconditional Jumpunconditional
JNAJump if Not AboveCF=1 or ZF=1
JNAEJump if Not Above or EqualCF=1
JNBJump if Not BelowCF=0
JNBEJump if Not Below or EqualCF=0 and ZF=0
JNCJump if Not CarryCF=0
JNEJump if Not EqualZF=0
JNGJump if Not Greater (signed)ZF=1 or SF != OF
JNGEJump if Not Greater or Equal (signed)SF != OF
JNLJump if Not Less (signed)SF=OF
JNLEJump if Not Less or Equal (signed)ZF=0 and SF=OF
JNOJump if Not Overflow (signed)OF=0
JNPJump if No ParityPF=0
JNSJump if Not Signed (signed)SF=0
JNZJump if Not ZeroZF=0
JOJump if Overflow (signed)OF=1
JPJump if ParityPF=1
JPEJump if Parity EvenPF=1
JPOJump if Parity OddPF=0
JSJump if Signed (signed)SF=1
JZJump if ZeroZF=1
Clocks Size
Bytes
Operands 808x 286 386 486
near8: jump 167+m7+m32
near8: no jump 4331
near16: jump --7+m33
near16: no jump --31
  • It's a good programming practice to organize code so the expected case is executed without a jump since the actual jump takes longer to execute than falling through the test.
  • see JCXZ and JMP for their respective timings

JCXZ / JECXZ - Jump if register (E)CX is Zero

Usage
JCXZ near8
JECXZ near16 (386+)
Modifies
None

Causes execution to branch to "label" if register CX is zero. Uses unsigned comparision.

Clocks Size
Bytes
Operands 808x 286 386 486
near8: jump 188+m9+m82
near8: no jump 6455

JMP - Unconditional Jump

Usage
JMP target
Modifies
None

Unconditionally transfers control to "label". Jumps by default are within -32768 to 32767 bytes from the instruction following the jump. NEAR and SHORT jumps cause the IP to be updated while FAR jumps cause CS and IP to be updated.

Clocks Size
Bytes
Operands 808x 286 386 486
rel8 (relative) 157+m7+m3
rel16 (relative) 157+m7+m3
rel32 (relative) --7+m3
reg16 (near, register indirect) 117+m7+m5
reg32 (near, register indirect) --7+m5
mem16 (near, mem indirect) 18 + EA11+m10+m5
mem32 (near, mem indirect) 24 + EA15+m10+m5
ptr16:16 (far, dword immed) --12+m17
ptr16:16 (far, PM dword immed) --27+m19
ptr16:16 (call gate, same priv.) -38+m45+m32
ptr16:16 (via TSS) -175+mTS42+TS
ptr16:16 (via task gate) -180+mTS43+TS
mem16:16 (far, indirect) --43+m13
mem16:16 (far, PM indirect) --31+m18
mem16:16 (call gate, same priv.) -41+m49+m31
mem16:16 (via TSS) -178+m5+TS41+TS
mem16:16 (via task gate) -183+m5+TS42+TS
ptr16:32 (far, 6 byte immed) --12+m13
ptr16:32 (far, PM 6 byte immed) --27+m18
ptr16:32 (call gate, same priv.) --45+m31
ptr16:32 (via TSS) --TS42+TS
ptr16:32 (via task state) --TS43+TS
m16:32 (far, address at dword) --43+m13
m16:32 (far, address at dword) --31+m18
m16:32 (call gate, same priv.) --49+m31
m16:32 (via TSS) --5+TS41+TS
m16:32 (via task state) --5+TS42+TS

LAHF - Load AH From Flags

Usage
LAHF
Modifies
None

Copies bits 0-7 of the flags register into AH. This includes flags AF, CF, PF, SF and ZF other bits are undefined.

AH := SF ZF xx AF xx PF xx CF
Clocks Size
Bytes
Operands 808x 286 386 486
none 42231

LAR - Load Access Rights (286+ protected)

Usage
LAR dest, src
Modifies
ZF

The high byte of the of the destination register is overwritten by the value of the access rights byte and the low order byte is zeroed depending on the selection in the source operand. The Zero Flag is set if the load operation is successful.

Clocks Size
Bytes
Operands 286 386 486
reg16, reg16 1415113
reg32, reg32 -15113
reg16, mem16 1616113-7
reg32, mem32 -16113-7

LDS - Load Pointer Using DS

Usage
LDS dest, src
Modifies
None

Loads 32-bit pointer from memory source to destination register and DS. The offset is placed in the destination register and the segment is placed in DS. To use this instruction the word at the lower memory address must contain the offset and the word at the higher address must contain the segment. This simplifies the loading of far pointers from the stack and the interrupt vector table.

Clocks Size
Bytes
Operands 808x 286 386 486
reg16, mem32 16 + EA7762-4
reg, mem (PM) --22125-7

LEA - Load Effective Address

Usage
LEA dest, src
Modifies
None

Transfers offset address of "src" to the destination register.

Clocks Size
Bytes
Operands 808x 286 386 486
reg, mem 2 + EA3212-4
  • The MOV instruction can often save clock cycles when used in place of LEA on 8088 processors

LEAVE - Restore Stack for Procedure Exit (80188+)

Usage
LEAVE
Modifies
None

Releases the local variables created by the previous ENTER instruction by restoring SP and BP to their condition before the procedure stack frame was initialized.

Clocks Size
Bytes
Operands 286 386 486
none 5451

LES - Load Pointer Using ES

Usage
LES dest, src
Modifies
None

Loads 32-bit pointer from memory source to destination register and ES. The offset is placed in the destination register and the segment is placed in ES. To use this instruction the word at the lower memory address must contain the offset and the word at the higher address must contain the segment. This simplifies the loading of far pointers from the stack and the interrupt vector table.

Clocks Size
Bytes
Operands 808x 286 386 486
reg, mem 16 + EA
7762-4
reg, mem (PM) --22125-7

LFS - Load Pointer Using FS (386+)

Usage
LFS dest, src
Modifies
None

Loads 32-bit pointer from memory source to destination register and FS. The offset is placed in the destination register and the segment is placed in FS. To use this instruction the word at the lower memory address must contain the offset and the word at the higher address must contain the segment. This simplifies the loading of far pointers from the stack and the interrupt vector table.

Clocks Size
Bytes
Operands 386 486
reg, mem 76 5-7
reg, mem (PM) 2212 5-7

LGDT - Load Global Descriptor Table (286+ privileged)

Usage
LGDT src
Modifies
None

Loads a value from an operand into the Global Descriptor Table (GDT) register.

Clocks Size
Bytes
Operands 286 386 486
mem64 1111115

LGS - Load Pointer Using GS (386+)

Usage
LGS dest, src
Modifies
None

Loads 32-bit pointer from memory source to destination register and GS. The offset is placed in the destination register and the segment is placed in GS. To use this instruction the word at the lower memory address must contain the offset and the word at the higher address must contain the segment. This simplifies the loading of far pointers from the stack and the interrupt vector table.

Clocks Size
Bytes
Operands 386 486
reg, mem 765-7
reg, mem (PM) 22125-7

LIDT - Load Interrupt Descriptor Table (286+ privileged)

Usage
LIDT src
Modifies
None

Loads a value from an operand into the Interrupt Descriptor Table (IDT) register.

Clocks Size
Bytes
Operands 286 386 486
mem64 121111 5

LLDT - Load Local Descriptor Table (286+ privileged)

Usage
LLDT src
Modifies
None

Loads a value from an operand into the Local Descriptor Table register (LDTR).

Clocks Size
Bytes
Operands 286 386 486
reg16 1720113
mem16 1924115

LMSW - Load Machine Status Word (286+ privileged)

Usage
LMSW src
Modifies
None

Loads the Machine Status Word (MSW) from data found at "src"

Clocks Size
Bytes
Operands 286 386 486
reg16 310133
mem16 613135

LOCK - Lock Bus

Usage
LOCK
LOCK: (386+ prefix)
Modifies
None

This instruction is a prefix that causes the CPU assert bus lock signal during the execution of the next instruction. Used to avoid two processors from updating the same data location. The 286 always asserts lock during an XCHG with memory operands. This should only be used to lock the bus prior to XCHG, MOV, IN and OUT instructions.

Clocks Size
Bytes
Operands 808x 286 386 486
none 20011

LODS - Load String (Byte, Word or Double)

Usage
LODSB
LODSW
LODSD (386+)
Modifies
None

Transfers string element addressed by DS:SI (even if an operand is supplied) to the accumulator. SI is incremented based on the size of the operand or based on the instruction used. If the Direction Flag is set SI is decremented, if the Direction Flag is clear SI is incremented. Use with REP prefixes.

Clocks Size
Bytes
Operands 808x 286 386 486
none 12
5551

LOOP - Decrement CX and Loop if CX Not Zero

Usage
LOOP near8
Modifies
None

Decrements CX by 1 and transfers control to "label" if CX is not Zero. The "label" operand must be within -128 or 127 bytes of the instruction following the loop instruction

Clocks Size
Bytes
Operands 808x 286 386 486
near16: jump 188+m11+m62
near8: no jump 54?2

LOOPE / LOOPZ - Loop While Equal / Loop While Zero

Usage
LOOPE near8
LOOPZ near8
Modifies
None

Decrements CX by 1 (without modifying the flags) and transfers control to "label" if CX != 0 and the Zero Flag is set. The "label" operand must be within -128 or 127 bytes of the instruction following the loop instruction.

Clocks Size
Bytes
Operands 808x 286 386 486
near8: jump 188+m11+m92
near8: no jump 54?6

LOOPNZ / LOOPNE - Loop While Not Zero / Loop While Not Equal

Usage
LOOPNZ near8
LOOPNE near8
Modifies
None

Decrements CX by 1 (without modifying the flags) and transfers control to "label" if CX != 0 and the Zero Flag is clear. The "label" operand must be within -128 or 127 bytes of the instruction following the loop instruction.

Clocks Size
Bytes
Operands 808x 286 386 486
near8: jump 198+m11+m92
near8: no jump 5466

LSL - Load Segment Limit (286+ protected)

Usage
LSL dest, src
Modifies
ZF

Loads the segment limit of a selector into the destination register if the selector is valid and visible at the current privilege level. If loading is successful the Zero Flag is set, otherwise it is cleared.

Clocks Size
Bytes
Operands 286 386 486
reg16, reg16 1420/25103
reg32, reg32 -20/25103
reg16, mem16 1621/26105
reg32, mem32 -21/26105
  • 386 times are listed "byte granular" / "page granular"

LSS - Load Pointer Using SS (386+)

Usage
LSS dest, src
Modifies
None

Loads 32-bit pointer from memory source to destination register and SS. The offset is placed in the destination register and the segment is placed in SS. To use this instruction the word at the lower memory address must contain the offset and the word at the higher address must contain the segment. This simplifies the loading of far pointers from the stack and the interrupt vector table.

Clocks Size
Bytes
Operands 386 486
reg, mem 765-7
reg, mem (PM) 22125-7

LTR - Load Task register (286+ privileged)

Usage
LTR src
Modifies
None

Loads the current task register with the value specified in "src".

Clocks Size
Bytes
Operands 286 386 486
reg16 1723203
mem16 1927205

MOV - Move

Usage
MOV dest, src
Modifies
None

Copies byte or word from the source operand to the destination operand. If the destination is SS interrupts are disabled except on early buggy 808x CPUs. Some CPUs disable interrupts if the destination is any of the segment registers.

Clocks Size
Bytes
Operands 808x 286 386 486
reg, reg 22212
mem, reg 9 + EA
3212-4
reg, mem 8 + EA
5412-4
mem, imm 10 + EA
3213-6
reg, imm 42212-3
mem, accum 10
3213
acc, mem 10
5413
segreg ,reg16 22232
segreg ,mem16 8 + EA
5592-4
reg16, segreg 22232
mem16, segreg 9 + EA
3232-4
reg32,CR0/CR2/CR3 --64
CR0 ,reg32 --1016
CR2 ,reg32 --443
CR3 ,reg32 --543
reg32, DR0/DR1/DR2/DR3 --22103
reg32, DR6/DR7 --22103
DR0/DR1/DR2/DR3 ,reg32 --22113
DR6/DR7 ,reg32 --16113
reg32,TR6/TR7 --1243
TR6/TR7 ,reg32 --1243
reg32,TR3 ---3
TR3 ,reg32 ---6
  • When the 386 special registers are used all operands are 32 bits

MOVS - Move String

Usage
MOVSB dest
MOVSW dest
MOVSD dest (386+)
Modifies
None

Copies data from addressed by DS:SI (even if operands are given) to the location ES:DI destination and updates SI and DI based on the size of the operand or instruction used. SI and DI are incremented when the Direction Flag is cleared and decremented when the Direction Flag is Set. Use with REP prefixes.

Clocks Size
Bytes
Operands 808x 286 386 486
dest, src 18
5771

MOVSX - Move with Sign Extend (386+)

Usage
MOVSX dest, src
Modifies
None

Copies the value of the source operand to the destination register with the sign extended.

Clocks Size
Bytes
Operands 386 486
reg, reg 333
reg, mem 633-7

MOVZX - Move with Zero Extend (386+)

Usage
MOVZX dest, src
Modifies
None

Copies the value of the source operand to the destination register with the zeroes extended.

Clocks Size
Bytes
Operands 386 486
reg, reg 333
reg, mem 633-7

MUL - Unsigned Multiply

Usage
MUL src
Modifies
CF OF (AF,PF,SF,ZF undefined)

Unsigned multiply of the accumulator by the source. If "src" is a byte value, then AL is used as the other multiplicand and the result is placed in AX. If "src" is a word value, then AX is multiplied by "src" and DX:AX receives the result. If "src" is a double word value, then EAX is multiplied by "src" and EDX:EAX receives the result. The 386+ uses an early out algorithm which makes multiplying any size value in EAX as fast as in the 8 or 16 bit registers.

Clocks Size
Bytes
Operands 808x 286 386 486
reg8 70-77139-1413-182
reg16 118-113219-2213-262
reg32 --9-3813-422-4
mem8 (76-83) + EA1612-1713-182-4
mem16 (124-139) + EA2412-2513-262-4
mem32 --12-2113-422-4

NEG - Two's Complement Negation

Usage
NEG dest
Modifies
AF CF OF PF SF ZF

Subtracts the destination from 0 and saves the 2s complement of "dest" back into "dest".

Clocks Size
Bytes
Operands 808x 286 386 486
reg 32212
mem 16 + EA
7632-4

NOP - No Operation (90h)

Usage
NOP
Modifies
None

This is a do nothing instruction. It results in occupation of both space and time and is most useful for patching code segments. (This is the original XCHG AL,AL instruction)

Clocks Size
Bytes
Operands 808x 286 386 486
none 33311

NOT - One's Compliment Negation (Logical NOT)

Usage
NOT dest
Modifies
None

Inverts the bits of the "dest" operand forming the 1s complement.

Clocks Size
Bytes
Operands 808x 286 386 486
reg 32212
mem 16 + EA
7632-4

OR - Inclusive Logical OR

Usage
OR dest, src
Modifies
CF OF PF SF ZF (AF undefined)

Logical inclusive OR of the two operands returning the result in the destination. Any bit set in either operand will be set in the destination.

Clocks Size
Bytes
Operands 808x 286 386 486
reg, reg 32212
mem, reg 16 + EA
7732-4
reg, mem 9 + EA
7622-4
reg, imm 43213-4
mem8, imm8 17 + EA7733-6
mem16, imm16 25 + EA7733-6
acc, imm 43212-3

OUT - Output Data to Port

Usage
OUT port, accum
Modifies
None

Transfers byte in AL,word in AX or dword in EAX to the specified hardware port address. If the port number is in the range of 0-255 it can be specified as an immediate. If greater than 255 then the port number must be specified in DX. Since the PC only decodes 10 bits of the port address, values over 1023 can only be decoded by third party vendor equipment and also map to the port range 0-1023.

Clocks Size
Bytes
Operands 808x 286 386 486
imm8,accum 10/14310162
imm8,accum (PM) --4/2411/31/292
DX,accum 8/12311161
DX,accum (PM) --5/2510/30/291
  • 386+ protected mode timings depend on privilege levels.
    First number is the timing when:
    CPL ≥ IOPL
    Second number is the timing when:
    CPL > IOPL
    Third number is the timing when:
    virtual mode on 486 processor

OUTS - Output String to Port (80188+)

Usage
OUTSB port, src
OUTSW port, src
OUTSD port, src (386+)
Modifies
None

Transfers a byte, word or doubleword from "src" to the hardware port specified in DX. For instructions with no operands the "src" is located at DS:SI and SI is incremented or decremented by the size of the operand or the size dictated by the instruction format. When the Direction Flag is set SI is decremented, when clear, SI is incremented. If the port number is in the range of 0-255 it can be specified as an immediate. If greater than 255 then the port number must be specified in DX. Since the PC only decodes 10 bits of the port address, values over 1023 can only be decoded by third party vendor equipment and also map to the port range 0-1023.

Clocks Size
Bytes
Operands 286 386 486
port, src 514171
port, src (PM) -8/2810/32/301
  • 386+ protected mode timings depend on privilege levels.
    First number is the timing when:
    CPL ≤ IOPL
    Second number is the timing when:
    CPL > IOPL
    Third number is the timing when:
    virtual mode on 486 processor

POP - Pop Word off Stack

Usage
POP dest
Modifies
None

Transfers word at the current stack top (SS:SP) to the destination then increments SP by two to point to the new stack top. CS is not a valid destination.

Clocks Size
Bytes
Operands 808x 286 386 486
reg16 85441
reg32 --441
segreg 85731
mem16 17 + EA5562-4
mem32 --562-4

POPA / POPAD - Pop All registers onto Stack (80188+)

Usage
POPA
POPAD (386+)
Modifies
None

Pops the top 8 words or double-words off the stack into the 8 general purpose 16/32 bit registers. registers are popped in the following order: (E)DI, (E)SI, (E)BP, (E)SP, (E)DX, (E)CX and (E)AX. The (E)SP value popped from the stack is actually discarded.

Clocks Size
Bytes
Operands 808x 286 386 486
none -192491

POPF / POPFD - Pop Flags off Stack

Usage
POPF
POPFD (386+)
Modifies
all flags

Pops word/doubleword from stack into the Flags register and then increments SP by 2 (for POPF) or 4 (for POPFD).

Clocks Size
Bytes
Operands 808x 286 386 486
none 8
5591
none (PM) --561

PUSH - Push Word onto Stack

Usage
PUSH src
PUSH immed (80188+ only)
Modifies
None

Decrements SP by the size of the operand (two or four, byte values are sign extended) and transfers one word from source to the stack top (SS:SP).

Clocks Size
Bytes
Operands 808x 286 386 486
reg16 11/153211
reg32 --211
mem16 16 + EA
5542-4
mem32 --542-4
segreg 10/143231
immed -3212-3

PUSHA / PUSHAD - Push All registers onto Stack (80188+)

Usage
PUSHA
PUSHAD (386+)
Modifies
None

Pushes all general purpose registers onto the stack in the following order: (E)AX, (E)CX, (E)DX, (E)BX, (E)SP, (E)BP, (E)SI, (E)DI. The value of SP is the value before the actual push of SP.

Clocks Size
Bytes
Operands 286 386 486
none 1924111

PUSHF / PUSHFD - Push Flags onto Stack

Usage
PUSHF
PUSHFD (386+)
Modifies
None

Transfers the Flags register onto the stack. PUSHF saves a 16 bit value while PUSHFD saves a 32 bit value.

Clocks Size
Bytes
Operands 808x 286 386 486
none 10/143441
none (PM) --431

RCL - Rotate Through Carry Left

Usage
RCL dest, count
Modifies
CF OF
Logic Diagram
     ┌───┐  ┌────────────┐
  ┌──│ C │<─│ 7 <───── 0 │<─┐
  │  └───┘  └────────────┘  │
  └─────────────────────────┘

Rotates the bits in the destination to the left "count" times with all data pushed out the left side re-entering on the right. The Carry Flag holds the last bit rotated out.

Clocks Size
Bytes
Operands 808x 286 386 486
reg, 1 22932
mem, 1 15 + EA
71042-4
reg, CL 8+4n5+n98-302
mem, CL 20 + EA + 4n
8+n109-312-4
reg, imm8 -5+n98-303
mem, imm8 -8+n109-313-5

RCR - Rotate Through Carry Right

Usage
RCR dest, count
Modifies
CF OF
Logic Diagram
     ┌───┐  ┌────────────┐
  ┌─>│ C │─>│ 7 ─────> 0 │──┐
  │  └───┘  └────────────┘  │
  └─────────────────────────┘

Rotates the bits in the destination to the right "count" times with all data pushed out the right side re-entering on the left. The Carry Flag holds the last bit rotated out.

Clocks Size
Bytes
Operands 808x 286 386 486
reg, 1 22932
mem, 1 15 + EA
71042-4
reg, CL 8+4n5+n98-302
mem, CL 20 + EA + 4n
8+n109-312-4
reg, imm8 -5+n98-303
mem, imm8 -8+n109-313-5

REP - Repeat String Operation

Usage
REP
Modifies
None

Repeats execution of string instructions while CX != 0. After each string operation, CX is decremented and the Zero Flag is tested.

Clocks Size
Bytes
Operands 808x 286 386 486
none 2221

The combination of a repeat prefix and a segment override on CPU's before the 386 may result in errors if an interrupt occurs before CX=0. The following code shows code that is susceptible to this and how to avoid it:

.again:
rep   movs byte ptr ES:[DI],ES:[SI] ; vulnerable instr.
jcxz  next                          ; continue if REP successful
loop  .again                        ; interrupt goofed count
next:

REPE / REPZ - Repeat Equal / Repeat Zero

Usage
REPE
REPZ
Modifies
None

Repeats execution of string instructions while CX != 0 and the Zero Flag is set. CX is decremented and the Zero Flag tested after each string operation. The combination of a repeat prefix and a segment override on processors other than the 386 may result in errors if an interrupt occurs before CX=0.

Clocks Size
Bytes
Operands 808x 286 386 486
none 2221

REPNE / REPNZ - Repeat Not Equal / Repeat Not Zero

Usage
REPNE
REPNZ
Modifies
None

Repeats execution of string instructions while CX != 0 and the Zero Flag is clear. CX is decremented and the Zero Flag tested after each string operation. The combination of a repeat prefix and a segment override on processors other than the 386 may result in errors if an interrupt occurs before CX=0.

Clocks Size
Bytes
Operands 808x 286 386 486
none 2221

RET / RETF - Return From Procedure

Usage
RET [nBytes]
RETF [nBytes]
RETN [nBytes]
Modifies
SP

Transfers control from a procedure back to the instruction address saved on the stack. "n bytes" is an optional number of bytes to release. Far returns pop the IP followed by the CS, while near returns pop only the IP register.

Clocks Size
Bytes
Operands 808x 286 386 486
retn 16 11+m10+m51
retn immed 20 11+m10+m53
retf 26 15+m18+m131
retf (PM, same priv.) --32+m181
retf (PM, lesser priv.) --68331
retf immed 25 15+m18+m143
retf immed (PM, same priv.) --32+m171
retf immed (PM, lesser priv.) --68331

ROL - Rotate Left

Usage
ROL dest, count
Modifies
CF OF
Logic Diagram
  ┌───┐     ┌────────────┐
  │ C │<─┬──│ 7 <───── 0 │<─┐
  └───┘  │  └────────────┘  │
         └──────────────────┘

Rotates the bits in the destination to the left "count" times with all data pushed out the left side re-entering on the right. The Carry Flag will contain the value of the last bit rotated out.

Clocks Size
Bytes
Operands 808x 286 386 486
reg,1 22332
mem, 1 15 + EA
7742-4
reg, CL 8+4n5+n332
mem, CL 20 + EA + 4n
8+n742-4
reg ,imm8 -5+n323
mem ,imm8 -8+n743-5

ROR - Rotate Right

Usage
ROR dest, count
Modifies
CF OF
Logic Diagram
     ┌────────────┐     ┌───┐
  ┌─>│ 7 ─────> 0 │──┬─>│ C │
  │  └────────────┘  │  └───┘
  └──────────────────┘

Rotates the bits in the destination to the right "count" times with all data pushed out the right side re-entering on the left. The Carry Flag will contain the value of the last bit rotated out.

Clocks Size
Bytes
Operands 808x 286 386 486
reg, 1 22332
mem, 1 15 + EA
7742-4
reg, CL 8+4n5+n332
mem, CL 20 + EA + 4n
8+n742-4
reg, imm8 -5+n323
mem, imm8 -8+n743-5

SAHF - Store AH register into FLAGS

Usage
SAHF
Modifies
AF CF PF SF ZF

Transfers bits 0-7 of AH into the Flags register. This includes AF, CF, PF, SF and ZF.

Clocks Size
Bytes
Operands 808x 286 386 486
none 42321

SAL / SHL - Shift Arithmetic Left / Shift Logical Left

Usage
SAL dest, count
SHL dest, count
Modifies
CF OF PF SF ZF (AF undefined)
Logic Diagram
┌───┐   ┌────────────┐
│ C │<──│ 7 <───── 0 │<── 0
└───┘   └────────────┘

Shifts the destination left by "count" bits with zeroes shifted in on right. The Carry Flag contains the last bit shifted out.

Clocks Size
Bytes
Operands 808x 286 386 486
reg, 1 22332
mem, 1 15 + EA
7742-4
reg, CL 8+4n5+n332
mem, CL 20 + EA + 4n
8+n742-4
reg, imm8 -5+n323
mem, imm8 -8+n743-5

SAR - Shift Arithmetic Right

Usage
SAR dest, count
Modifies
CF OF PF SF ZF (AF undefined)
Logic Diagram
     ┌────────────┐   ┌───┐
  ┌─>│ 7 ─────> 0 │─> │ C │
  │  └────────────┘   └───┘
  └────┘

Shifts the destination right by "count" bits with the current sign bit replicated in the leftmost bit. The Carry Flag contains the last bit shifted out.

Clocks Size
Bytes
Operands 808x 286 386 486
reg,122332
mem, 1 15 + EA
7742-4
reg, CL 8+4n5+n332
mem, CL 20 + EA + 4n
8+n742-4
reg, imm8 -5+n323
mem, imm8 -8+n743-5

SBB - Subtract with Borrow/Carry

Usage
SBB dest, src
Modifies
AF CF OF PF SF ZF

Subtracts the source from the destination, and subtracts 1 extra if the Carry Flag is set. Results are returned in "dest".

Clocks Size
Bytes
Operands 808x 286 386 486
reg, reg 32212
mem, reg 16 + EA
7632-4
reg, mem 9 + EA
7722-4
reg, imm 43213-4
mem, imm 17 + EA
7733-6
acc, imm 43212-3

SCAS - Scan String

Usage
SCASB
SCASW
SCASD (386+)
Modifies
AF CF OF PF SF ZF

Compares value at ES:DI (even if operand is specified) from the accumulator and sets the flags similar to a subtraction. DI is incremented/decremented based on the instruction format (or operand size) and the state of the Direction Flag. Use with REP prefixes.

Clocks Size
Bytes
Operands 808x 286 386 486
none 15 7761

SETAE / SETNB - Set if Above or Equal / Set if Not Below (386+)

Usage
SETAE dest
SETNB dest
Modifies
none

Sets the byte in the operand to 1 if the Carry Flag is clear otherwise sets the operand to 0.

Clocks Size
Bytes
Operands 386 486
reg8 433
mem8 543

SETB / SETNAE - Set if Below / Set if Not Above or Equal (386+)

Usage
SETB dest
SETNAE dest
Modifies
none

Sets the byte in the operand to 1 if the Carry Flag is set otherwise sets the operand to 0.

Clocks Size
Bytes
Operands 386 486
reg8 433
mem8 543

SETBE / SETNA - Set if Below or Equal / Set if Not Above (386+)

Usage
SETBE dest
SETNA dest
Modifies
none

Sets the byte in the operand to 1 if the Carry Flag or the Zero Flag is set, otherwise sets the operand to 0.

Clocks Size
Bytes
Operands 386 486
reg8 433
mem8 543

SETE / SETZ - Set if Equal / Set if Zero (386+)

Usage
SETE dest
SETZ dest
Modifies
none

Sets the byte in the operand to 1 if the Zero Flag is set, otherwise sets the operand to 0.

Clocks Size
Bytes
Operands 386 486
reg8 433
mem8 543

SETNE / SETNZ - Set if Not Equal / Set if Not Zero (386+)

Usage
SETNE dest
SETNZ dest
Modifies
none

Sets the byte in the operand to 1 if the Zero Flag is clear, otherwise sets the operand to 0.

Clocks Size
Bytes
Operands 386 486
reg8 433
mem8 543

SETL / SETNGE - Set if Less / Set if Not Greater or Equal (386+)

Usage
SETL dest
SETNGE dest
Modifies
none

Sets the byte in the operand to 1 if the Sign Flag is not equal to the Overflow Flag, otherwise sets the operand to 0.

Clocks Size
Bytes
Operands 386 486
reg8 433
mem8 543

SETGE / SETNL - Set if Greater or Equal / Set if Not Less (386+)

Usage
SETGE dest
SETNL dest
Modifies
none

Sets the byte in the operand to 1 if the Sign Flag equals the Overflow Flag, otherwise sets the operand to 0.

Clocks Size
Bytes
Operands 386 486
reg8 433
mem8 543

SETLE / SETNG - Set if Less or Equal / Set if Not greater or Equal (386+)

Usage
SETLE dest
SETNG dest
Modifies
none

Sets the byte in the operand to 1 if the Zero Flag is set or the Sign Flag is not equal to the Overflow Flag, otherwise sets the operand to 0.

Clocks Size
Bytes
Operands 386 486
reg8 433
mem8 543

SETG / SETNLE - Set if Greater / Set if Not Less or Equal (386+)

Usage
SETG dest
SETNLE dest
Modifies
none

Sets the byte in the operand to 1 if the Zero Flag is clear or the Sign Flag equals to the Overflow Flag, otherwise sets the operand to 0.

Clocks Size
Bytes
Operands 386 486
reg8 433
mem8 543

SETS - Set if Signed (386+)

Usage
SETS dest
Modifies
none

Sets the byte in the operand to 1 if the Sign Flag is set, otherwise sets the operand to 0.

Clocks Size
Bytes
Operands 386 486
reg8 433
mem8 543

SETNS - Set if Not Signed (386+)

Usage
SETNS dest
Modifies
none

Sets the byte in the operand to 1 if the Sign Flag is clear, otherwise sets the operand to 0.

Clocks Size
Bytes
Operands 386 486
reg8 433
mem8 543

SETC - Set if Carry (386+)

Usage
SETC dest
Modifies
none

Sets the byte in the operand to 1 if the Carry Flag is set, otherwise sets the operand to 0.

Clocks Size
Bytes
Operands 386 486
reg8 433
mem8 543

SETNC - Set if Not Carry (386+)

Usage
SETNC dest
Modifies
none

Sets the byte in the operand to 1 if the Carry Flag is clear, otherwise sets the operand to 0.

Clocks Size
Bytes
Operands 386 486
reg8 433
mem8 543

SETO - Set if Overflow (386+)

Usage
SETO dest
Modifies
none

Sets the byte in the operand to 1 if the Overflow Flag is set, otherwise sets the operand to 0.

Clocks Size
Bytes
Operands 386 486
reg8 433
mem8 543

SETNO - Set if Not Overflow (386+)

Usage
SETNO dest
Modifies
none

Sets the byte in the operand to 1 if the Overflow Flag is clear, otherwise sets the operand to 0.

Clocks Size
Bytes
Operands 386 486
reg8 433
mem8 543

SETP / SETPE - Set if Parity / Set if Parity Even (386+)

Usage
SETP dest
SETPE dest
Modifies
none

Sets the byte in the operand to 1 if the Parity Flag is set, otherwise sets the operand to 0.

Clocks Size
Bytes
Operands 386 486
reg8 433
mem8 543

SETNP / SETPO - Set if No Parity / Set if Parity Odd (386+)

Usage
SETNP dest
SETPO dest
Modifies
none

Sets the byte in the operand to 1 if the Parity Flag is clear, otherwise sets the operand to 0.

Clocks Size
Bytes
Operands 386 486
reg8 433
mem8 543

SGDT - Store Global Descriptor Table (286+ privileged)

Usage
SGDT dest
Modifies
none

Stores the Global Descriptor Table (GDT) register into the specified operand.

Clocks Size
Bytes
Operands 286 386 486
mem64 119105

SIDT - Store Interrupt Descriptor Table (286+ privileged)

Usage
SIDT dest
Modifies
none

Stores the Interrupt Descriptor Table (IDT) register into the specified operand.

Clocks Size
Bytes
Operands 286 386 486
mem64 129105

SHR - Shift Logical Right

Usage
SHR dest, count
Modifies
CF OF PF SF ZF (AF undefined)
Logic Diagram
      ┌────────────┐   ┌───┐
  0 ─>│ 7 ─────> 0 │──>│ C │
      └────────────┘   └───┘

Shifts the destination right by "count" bits with zeroes shifted in on the left. The Carry Flag contains the last bit shifted out.

Clocks Size
Bytes
Operands 808x 286 386 486
reg, 1 22332
mem, 1 15 + EA
7742-4
reg, CL 8+4n5+n332
mem, CL 20 + EA + 4n
8+n742-4
reg, imm8 -5+n323
mem, imm8 -8+n743-5

SHLD / SHRD - Double Precision Shift (386+)

Usage
SHLD dest, src, count
SHRD dest, src, count
Modifies
CF PF SF ZF (OF,AF undefined)

SHLD shifts "dest" to the left "count" times and the bit positions opened are filled with the most significant bits of "src". SHRD shifts "dest" to the right "count" times and the bit positions opened are filled with the least significant bits of the second operand. Only the 5 lower bits of "count" are used.

Clocks Size
Bytes
Operands 386 486
reg16, reg16, imm8 324
reg32, reg32, imm8 324
mem16, reg16, imm8 736
mem32, reg32, imm8 736
reg16, reg16, CL 333
reg32, reg32, CL 333
mem16, reg16, CL 745
mem32, reg32, CL 745

SLDT - Store Local Descriptor Table (286+ privileged)

Usage
SLDT dest
Modifies
none

Stores the Local Descriptor Table (LDT) register into the specified operand.

Clocks Size
Bytes
Operands 286 386 486
reg16 2223
mem16 2235

SMSW - Store Machine Status Word (286+ privileged)

Usage
SMSW dest
Modifies
none

Store Machine Status Word (MSW) into "dest".

Clocks Size
Bytes
Operands 286 386 486
reg16 21023
mem16 3335

STC - Set Carry

Usage
STC
Modifies
CF

Sets the Carry Flag to 1.

Clocks Size
Bytes
Operands 808x 286 386 486
none 22221

STD - Set Direction Flag

Usage
STD
Modifies
DF

Sets the Direction Flag to 1 causing string instructions to auto-decrement SI and DI instead of auto-increment.

Clocks Size
Bytes
Operands 808x 286 386 486
none 22221

STI - Set Interrupt Flag (Enable Interrupts)

Usage
STI
Modifies
IF

Sets the Interrupt Flag to 1, which enables recognition of all hardware interrupts. If an interrupt is generated by a hardware device, an End of Interrupt (EOI) must also be issued to enable other hardware interrupts of the same or lower priority.

Clocks Size
Bytes
Operands 808x 286 386 486
none 22251

STOS - Store String

Usage
STOSB
STOSW
STOSD
Modifies
None

Stores value in accumulator to location at ES:(E)DI (even if operand is given). (E)DI is incremented/decremented based on the size of the operand (or instruction format) and the state of the Direction Flag. Use with REP prefixes.

Clocks Size
Bytes
Operands 808x 286 386 486
none 11 3451

STR - Store Task register (286+ privileged)

Usage
STR dest
Modifies
None

Stores the current Task register to the specified operand.

Clocks Size
Bytes
Operands 286 386 486
reg16 2223
mem16 3235

SUB - Subtract

Usage
SUB dest, src
Modifies
AF CF OF PF SF ZF

The source is subtracted from the destination and the result is stored in the destination.

Clocks Size
Bytes
Operands 808x 286 386 486
reg, reg 32212
mem, reg 16 + EA
7632-4
reg, mem 9 + EA
7722-4
reg, imm 43213-4
mem, imm 17 + EA
7733-6
acc, imm 43212-3

TEST - Test For Bit Pattern

Usage
TEST dest, src
Modifies
CF OF PF SF ZF (AF undefined)

Performs a logical AND of the two operands updating the flags register without saving the result.

Clocks Size
Bytes
Operands 808x 286 386 486
reg, reg 32112
reg, mem 9 + EA
6512-4
mem, reg 9 + EA
6522-4
reg, imm 53213-4
mem, imm 11 + EA6523-6
acc, imm 43212-3

VERR - Verify Read (286+ protected)

Usage
VERR src
Modifies
ZF

Verifies the specified segment selector is valid and is readable at the current privilege level. If the segment is readable, the Zero Flag is set, otherwise it is cleared.

Clocks Size
Bytes
Operands 286 386 486
reg16 1410113
mem16 1611115

VERW - Verify Write (286+ protected)

Usage
VERW src
Modifies
ZF

Verifies the specified segment selector is valid and is ratable at the current privilege level. If the segment is writable, the Zero Flag is set, otherwise it is cleared.

Clocks Size
Bytes
Operands 286 386 486
reg16 1415113
mem16 1616115

WAIT /FWAIT - Event Wait

Usage
WAIT
FWAIT
Modifies
None

CPU enters wait state until the co-processor signals it has finished its operation. This instruction is used to prevent the CPU from accessing memory that may be temporarily in use by the co-processor. WAIT and FWAIT are identical.

Clocks Size
Bytes
Operands 808x 286 386 486
none 436+1-31

WBINVD - Write-Back and Invalidate Cache (486+)

Usage
WBINVD
Modifies
None

Flushes internal cache, then signals the external cache to write back current data followed by a signal to flush the external cache.

Clocks Size
Bytes
Operands 486
none52

XCHG - Exchange

Usage
XCHG dest, src
Modifies
None

Exchanges contents of source and destination.

Clocks Size
Bytes
Operands 808x 286 386 486
reg, reg 43332
mem, reg 17 + EA
5552-4
reg, mem 17 + EA
5532-4
accum, reg 33331
reg,accum 33331

XLAT / XLATB - Translate

Usage
XLAT translation-table
XLATB (masm 5.x)
Modifies
None

Replaces the byte in AL with byte from a user table addressed by BX. The original value of AL is the index into the translate table. The best way to discripe this is MOV AL,[BX+AL]

Clocks Size
Bytes
Operands 808x 286 386 486
table offset 115541

XOR - Exclusive OR

Usage
XOR dest, src
Modifies
CF OF PF SF ZF (AF undefined)

Performs a bitwise exclusive OR of the operands and returns the result in the destination.

Clocks Size
Bytes
Operands 808x 286 386 486
reg, reg 32212
mem, reg 16 + EA
7632-4
reg, mem 9 + EA
7722-4
reg, imm 43213-4
mem, imm 17 + EA
7733-6
acc, imm 43212-3

About This Reference

This page is based on the x86 reference found in the "PC Games Programmers Encyclopedia" (aka the PCGPE) by Mark Feldman though additions and changes have been (and will continue to be) added from several other sources.

For years the PCGPE has been my go-to when working with my retro PC projects, but the current online copies keep going AWOL and the .txt file is often hard to navigate / search. It also seems Mark's official website and even his e-mail have long gone dead. At some point I may put up several other sections from it on my website since I refer to it so often.

This version of the reference was created for a host of reasons:

  1. Make it easier to navigate on my Android tablet
  2. To be able to filter out processor specific instructions. 90% of the time I only care about 8086/8088 and not 286/newer. I didn't want to just blindly delete them as there are times I need them too.
  3. Testing out just how far the functionality of CSS3's :target pseudostate could be pushed so as to make such a single-page navigation far, far less reliant on JavaScript, and even semi-functional scripting disabled.
  4. Make a place where I can make additions, corrections, and clarifications. In particular the size of many opcodes is flat out missing, as well as the execution time on the 486! Anyone want to help me fill in those blanks, feel free to send me corrections or additions via this site's Contact Form. Anyone wants to double-check I didn't goof any of the information would help too.
  5. Address the fact most (if not all) other online copies just use the <PRE> tag to blindly copy the existing text, making the tables often messed up or hard to follow. Making them actual tables will be better for accessibility, usability, and clarity of style. I did however decide to keep the various rotate/shift function artworks as preformatted character data, but updated to leverage the UTF-8 character set.